SDSD - II Mid Objective Paper with Answers (April 2012)

               JAWAHARLAL NEHRU TECHNOLOGICAL UNIVERSITY, HYDERABAD

                             II B.Tech. II Sem., II Mid-Term Examinations, April – 2012
                         
                                  STRUCTURED  DIGITAL  SYSTEM  DESIGN
                                                     Objective Exam

I    Choose the correct alternative:

1.    The basic difference between system controller, other  machine is          [    ]

A) Sequential code detector    B) Counters    C) Number of control inputs  D) All

2.    The result of improper synchronization will lead to              [    ]

 A) Proper operation    B) Good result    C) Good performance        D) Fault operations

3.     __________  is a sort of mutual agreement to synchronize        [    ]

A) Hand shake        B) Movement    C) Forward part             D) Runing

4.    Large scale system controllers are generally classified by the _____ in the state diagram  [    ]

 A) Number of states    B) Number of inputs    C) Number of outputs    D) All

5.    A model memory has 2n × M represents, n =      , M =          [    ]

A) Flip flops,outputs    B) Register,outputs    C) Inputs, digital output    D) None

6.    Ripple counters are  _________  counters            [    ]

A) Synchronous    B) Asynchronous       C) Simple        D) A&B

7.    Each flip flop is feedback on itself, making it a __________ counter        [    ]

 A) Module-2    B) Module-3    C) Module-4    D) Module-7

8.    The time period between the following rising edge of the clock is________ as the systems setting time. [    ]

A) Equal & greater    B) Lower    C) Greater    D) Equal

9.    SISO  register is also refered to as -----------------------bridge        [    ]

 A) Bit bucket    B) byte bucket    C) word bucket    D) none

10.    Twisted ring counters requires --------flipflops for  modulo-n counter        [    ]

 A)  n+1    B) n-1    C) n/2    D) 2n








II    Fill in the blanks:

11.    Single mode counters is a sequential machine with No external inputs and No output decoder.

12.    Ripple counter is a cascade of module 2 counters, triggered by output of preceding stage.

13.    MDS stands for Mnemonic Documented State diagram.


14. System Controller is synchronous machine, designed to interpret system level control input sequences and generates system level output sequence.


15.    The major difference between ROM, PLA is Exhaustive input decoder and output decoder.

16.    Disadvantages of ripple counter are Speed and Forced straight binary code sequence.

17.    The level synchronization is characterized by the condition T_p >> T_c.

18.    The basic disadvantage of direct addressed MUX implementation is inefficient use of MUX.

19.    EPROM also called Read Mostly Memory (RMM).

20.    When up/down=1, the counter follows UP sequence.